For the past several decades, the scaling of features in integrated circuits has been a driving force behind an ever-growing semiconductor industry. Scaling to smaller and smaller features enables increased densities of functional units on the limited real estate of semiconductor chips. For example, shrinking transistor size allows for the incorporation of an increased number of memory devices on a chip, lending to the fabrication of products with increased capacity.
Recently, research on non-silicon devices like high electron mobility transistors (HEMT) employing quantum-well field effect transistors (QWFET) has increased. Quantum-well devices are typically formed in epitaxially grown semiconductor hetero-structures, such as in compound semiconductor materials like III-V systems. Such non-silicon devices offer the promise of exceptionally high carrier mobility in the transistor channels due to low effective carrier mass. Coupled with modern manufacturing techniques capable of forming nanometer scale channel lengths, transistors having ballistic carrier transport may become a reality.
However, as those in the art will appreciate, the inability to form a good quality gate dielectric (e.g., comparable to SiO2 for the silicon-based devices) on compound semiconductor materials has precluded widespread adoption of III-V semiconductor transistor devices.